This button will start the execution of the code inside the emulator
This button will reset the registers and the status of the emulator
This button will execute the next line of code of the emulation
This button will undo the previous line of code of the emulation
Add the source operand to the destination operand and store the result in the destination location.
Add the source operand to the destination address register and store the result in the destination address register. The source is sign-extended before it is added to the destination
Add immediate data to the destination operand. Store the result in the destination operand.
Subtract the source operand from the destination operand and store the result in the destination location.
Subtract the source operand from the destination operand and store the result in the destination address register. Word operations are sign-extended to 32 bits prior to subtraction.
Subtract the immediate data from the destination operand. Store the result in the destination operand.
AND the source operand to the destination operand and store the result in the destination location.
AND the immediate data to the destination operand.
EOR (exclusive or) the source operand with the destination operand and store the result in the destination location
EOR the immediate data with the contents of the destination operand. Store the result in the destination operand.
Calculate the logical complement of the destination and store the result in the destination. The difference between NOT and NEG is that NOT performs a bit-by-bit logical complementation, while a NEG performs a twos complement arithmetic subtraction
OR the source operand to the destination operand, and store the result in the destination location.
OR the immediate data with the destination operand. Store the result in the destination operand.
The destination is cleared loaded with all zeros. The CLR instruction can't be used to clear an address register.
Exchange the contents of two registers. The size of the instruction is a longword because the entire 32-bit contents of two registers are exchanged. The instruction permits the exchange of address registers, data registers, and address and data registers.
Extend the least-significant byte in a data register to a word, or extend the least-significant word in a data register to a longword.
Move the contents of the source to the destination location. The data is examined as it is moved and the condition codes set accordingly. Note that this is actually a copy command because the source is not affected by the move
Move the contents of the source to the destination location. The destination is an address register. The source must be a word or longword. If it is a word, it is sign-extended to a longword. The condition codes are not affected.
Subtract the destination operand from 0 and store the result in the destination location. The difference between NOT and NEG instructions is that NOT performs a bit-by-bit logical complementation, while a NEG performs a twos complement arithmetic subtraction
Exchange the upper and lower 16-bit words of a data register.
Arithmetically shift the bits of the operand in the specified direction (left). The shift count may be specified in one of three ways. The count may be a literal, the contents of a data register, or the value 1
Arithmetically shift the bits of the operand in the specified direction (right). The shift count may be specified in one of three ways. The count may be a literal, the contents of a data register, or the value 1
Logically shift the bits of the operand in the specified direction (left). A zero is shifted into the input position and the bit shifted out is copied into both the C- and the X-bit of the CCR.The shift count may be specified in one of three ways. The count may be a literal, the contents of a data register, or the value 1.
Logically shift the bits of the operand in the specified direction (right). A zero is shifted into the input position and the bit shifted out is copied into both the C- and the X-bit of the CCR.The shift count may be specified in one of three ways. The count may be a literal, the contents of a data register, or the value 1.
Rotate the bits of the operand in the direction indicated (left). The extend bit, X, is not included in the operation. A rotate operation is circular in the sense that the bit shifted out at one end is shifted into the other end. That is, no bit is lost or destroyed by a rotate operation.The shift count may be specified in one of three ways: the count may be a literal, the contents of a data register, or the value 1.
Rotate the bits of the operand in the direction indicated (left). The extend bit, X, is not included in the operation. A rotate operation is circular in the sense that the bit shifted out at one end is shifted into the other end. That is, no bit is lost or destroyed by a rotate operation.The shift count may be specified in one of three ways: the count may be a literal, the contents of a data register, or the value 1.
Subtract the source operand from the destination operand and set the condition codes accordingly. The destination must be a data register. The destination is not modified by this instruction.
Subtract the source operand from the destination address register and set the condition codes accordingly. The address register is not modified. The size of the operation may be specified as word or longword
Subtract the immediate data from the destination operand and set the condition codes accordingly the destination is not modified
The operand is compared with zero. No result is saved, but the contents of the CCR are set according to the result.
Program execution continues at the effective address specified by the instruction.
JSR pushes the longword address of the instruction immediately following the JSR onto the system stack. Program execution then continues at the address specified in the instruction.
The program counter is pulled from the stack and the previous value of the PC is lost. RTS is used to terminate a subroutine.
Branch always , program execution continues at location [PC] + d. The displacement, d, is a twos complement value (8 bits for a short branch and 16 bits for a long branch). The value in the PC corresponds to the current location plus two
Branch to subroutine, the longword address of the instruction immediately following the BSR instruction is pushed onto the system stack pointed at by A7. Program execution then continues at location [PC] + displacement. The displacement is an 8-bit twos complement value for a short branch, or a 16-bit twos complement value for a long branch. The value in the PC corresponds to the current location plus two
If the specified logical condition (branch on equal) is met, program execution continues at location [PC] + displacement, d. The displacement is a two's complement value.
If the specified logical condition (branch on not equal) is met, program execution continues at location [PC] + displacement, d. The displacement is a two's complement value.
If the specified logical condition (branch on greater than or equal) is met, program execution continues at location [PC] + displacement, d. The displacement is a two's complement value.
If the specified logical condition (branch on greater than) is met, program execution continues at location [PC] + displacement, d. The displacement is a two's complement value.
If the specified logical condition (branch on less than or equal) is met, program execution continues at location [PC] + displacement, d. The displacement is a two's complement value.
If the specified logical condition (branch on less than) is met, program execution continues at location [PC] + displacement, d. The displacement is a two's complement value.
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